is an ALTERA Stratix IV 360-820 & Stratix III 80E-340L, PCIe based Board.
The ProcStar IV™
system provides a high-capacity, high-speed FPGA-based platform fortified with
high throughput and massive memory resulting in a powerful and highly flexible
system. The ProcStar IV can be hosted via 8-lane PCI Express. The performance,
memory and add-on daughter boards' flexible architecture enable the system to
meet almost any computation needs. In addition to 2 GB on-board memory, eight
SODIMM sockets provide up to 32 GB of memory or additional connectivity and
logic. Abundant memory conjoined with fast PCIe connection enable strong
co-processing between a standard PC operating system and the FPGA acceleration.
The ProcStar IV
system, with Gidel's ProcDeveloper's Kit and tools, offers an incredible
performance yet supports quick implementation of your unique design. This is
achieved by eliminating the need for a high-speed board design, a PCI Express
application driver, board constraints and environment FPGA code. The generated
HDL code enables high throughput, easy-to-use parallel access to large memories.
As a result, designers can focus on their proprietary value-added design. User
designs may be in HDL, C-based, Simulink (graphical design) or any combination
Up to 4 Stratix
360, 530 and 820 FPGAs
8-lane PCI Express (PCIe x8) host interface
Five level memory structure
Maximum sustain throughput of 18,770 GB/s to internal
memories and 48 GB/s to DRAMs as follows:
6440 M9K (9K-bit) DPRAM blocks
GB/s throughput @ 300Mhz)
240 M144K (144K-bit) RAM blocks
(1,382 GB/s throughput @ 300Mhz)
Up to 65,050 MLAB (640-bit) RAM blocks
4 large 512MB DDR2 memories with 16GB/s sustain throughput using up
to 24 ports. (Up to 64 ports with lower access rate)
8 DDR2 SODIMMs with up to 4GB each at a maximum sustain
throughput of 32 GB/s using up to 64 ports.
Supports 5 ProcStar IV Daughter Boards (PSDB): SDI, DVI, Camera
Link, PHY II and other interfaces
Typical system frequencies: 100-325 MHz.
Flexible clocking system.
Volatile and non volatile design security
Reference design for fast direct board to board connection via
Supported by Gidel's
Proc Developer's Kits.
Leading edge performance.
Maximum flexibility to fit
Cuts development cycle time and
Long life cycle.
COTS acquisition and accelerator boards in:
HPC (High Performance Computing)
Machine Vision and Imaging
High performance acquisition systems
Small ASIC and SoC Prototyping
Complex algorithm and IPs validation
boards can be easily re-configured by user's software. The
re-configuration is accomplished simply by closing the current class
object and opening a new application driver object. The board can
alternatively be re-configured by calling the Load_IC method or using
development tool in order to merely replace a specific device.
- The application drivers are automatically
- The rapid parallel access to on-board DRAM
and DDR II memories can also be reconfigured using the
Proc Multiport controller.