Products > PROC_HILs

PROC HILs, a revolution in computation

The Perfect Combination of Power and Flexibility

    Automatically create a hardware accelerator for your Simulink® design
    Build Simulink® designs and accelerate them on FPGA by several hundred times
    Create high-performance DSP applications without the need to know hardware codes      
    DSP software designers can have the FPGA power advantage
    Enable system developers to work in a graphic environment
    Flexible solutions to complex FPGA system requirements


GIDEL PROC_HILsTM is a state-of-the-art Hardware-in-the-Loop acceleration tool for running Simulink® designs on FPGAs.

GIDEL PROC_HILsTM can automatically translate Simulink® designs into FPGA code and run this code under Simulink. The generated code is compatible with the PROC board installed on the target PC, and has the synchronization code needed to communicate with Simulink® .

The simulation of a Simulink® design, or any part of it, run on a high-capacity, high-speed PROC board is significantly accelerated.

   How it Works
GIDEL PROC_HILsTM enables the user to download a Simulink® design into GiDEL PROC board and simulate it, while the design runs on the on-board FPGAs, communicating with Simulink® in the real time.

The process is simple.

Build your Simulink® design.

Add GiDEL PROC_HILs block to the design and double-click on it to obtain the PROC_HILs Integration Tool
for a fully automated process.

   PROC_HILL_INTEGRATION, Hardware-in-the-loop

Click Go! to start the integration process.

  Hardware in the loop, start

Hardware in the loop, concept

The whole generation process is fully automatic.
An HDL code is generated from your Simulink® design and then synthesized and compiled to get an .rbf file (FPGA binary file) compatible with the PROC board.


When the generation process is completed, a new Simulink® design is generated. This design contains an HIL block including all the inputs and outputs that were present in the original design. This HIL block is connected to all the sources and sinks your original design was connected to.

The HIL block automatically loads the .rbf file into the board and performs all the necessary communications to execute the design in hardware. The design runs fully synchronized with Simulink®, receiving the signals from the simulation sources and outputting the results into the sinks.

    PROC_HILs Application Examples
  • Algorithm design and verification
  • DSP
  • System hardware acceleration
  • Rapid prototyping
    PROC_HILs Key Features
  • Data transfers to / from FPGAs using DMA to ensure optimal performance
  • Requires no programming knowledge whatsoever
  • Fully automatic code generation and downloading into FPGA
  • Flexible board architecture that enables adding daughterboards to provide additional interface, such as DVI and CameraLink
  • Intuitive user-friendly interface that enables stopping the generation process at any stage to add your own HDL code to the generated logic
  • Full integration with third party processing and various compilation tools such as Simulink HDL Coder and Altera DSP Builder
    PROC_HILs Benefits
  • Dramatically improves simulation speed, with a dedicated accelerator for your Simulink® design
  • Combines the power and convenience of a visual development tool with the speed of a hardware design
  • Enables building a design visually and downloading it directly into the PROC board
  • Enables concurrent engineering at an early stage
  • Maximum flexibility to fit your needs
  • Cuts development cycle time and budget
  • Complex systems efficiently tested in automated test runs
  • Improved design reliability





Proc Boards: ProceV |ProcStarIV | ProceIV | Proc104 | PROCStarIII  | ProceIII 
ProcWizard | ProcMultiPort | Proc Boards | Proc Daughterboards | ProcHILs | ProcFG

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