is an ALTERA Stratix IV 360-820 , PCIe based Board.
The Proce IV™
system provides a high-capacity, high-speed FPGA-based platform fortified with
high throughput and massive memory, resulting in a powerful and highly flexible
system. The Proce IV can be hosted via 4-lane PCI Express. The board’s high
speed performance coupled with memory and add-on daughter boards' flexible
architecture enable the system to meet almost any computational needs. In
addition to 512MB on-board memory, two SODIMM sockets provide up to 8GB of
memory or additional connectivity and logic. Abundant memory conjoined with fast
PCIe connection enable strong co-processing between a standard PC operating
system and the FPGA acceleration.
The Proce IV
system, with Gidel's ProcDeveloper's Kit and tools, offers incredible
performance yet supports quick implementation of your unique design. These
unique features are achieved by eliminating the need for a high-speed board
design, a PCI Express application driver, board constraints and environment FPGA
code. The generated HDL code enables high throughput, easy-to-use parallel
access to large memories. As a result, designers can focus on their proprietary
value-added design. User designs may be in HDL, C-based, Simulink (graphical
design) or any combination of them.
360, 530 and 820 FPGAs
4-lane PCI Express (PCIe x4) host interface
Five level memory structure (8.5 GB+).
Maximum sustain throughput of 4,693 GB/s for internal memories and
12 GB/s for DRAMs as follows:
1280 M9K (9K-bit) DPRAM blocks
64 M144K (144K-bit) RAM blocks
Up to 10,624 MLAB (320-bit) RAM blocks
A 512 MB DDR2 memory with 4 GB/s sustain throughput using up to 8
ports. (Up to 16 ports with lower access rate)
2 DDR2 SODIMMs with up to 4 GB each at a maximum sustain throughput
of 8 GB/s
Onboard SRAM options on SODIMM modules
Supports 2 Proce IV Daughter Boards:
Camera Links, SDI, User's Ethernet and other interfaces
Typical system frequencies: 100-325 MHz
Flexible clocking system
Volatile and non-volatile design security
Supported by Gidel's Proc Developer's Kit
Advance development tools.
COTS acquisition and accelerator boards in:
HPC (High Performance Computing)
Machine Vision and Imaging
High performance acquisition systems
Small ASIC and SoC Prototyping
Complex algorithm and IPs validation
boards can be easily re-configured by user's software. The
re-configuration is accomplished simply by closing the current class
object and opening a new application driver object. The board can
alternatively be re-configured by calling the Load_IC method or using
development tool in order to merely replace a specific device.
- The application drivers are automatically
- The rapid parallel access to on-board DRAM
and DDR II memories can also be reconfigured using the
Proc Multiport controller.